90nm Process Technologies

90 nanometer (nm) is the first geometry developed by GLOBALFOUNDRIES as part of the Joint Development Alliance. Co-developed with IBM, the 90nm includes a 90nm Low Power and 90nm Generic process platform with a comprehensive ecosystem of design enablement and backend services including IP, libraries, reference flows as well as test and packaging.

The 90nm platforms are targeted at complex applications required in today's marketplace, where computer, communications and consumer products are converging. They provide the ultimate solution in foundry compatibility, design portability and flexible sourcing across multiple suppliers of leading-edge production capacity. With a common set of GDSII-compatible libraries and IP developments, customers can manufacture their advanced chip designs at GLOBALFOUNDRIESs' and IBM's facilities with minimum design rework. Companies enjoy unprecedented flexibility as they are no longer tied to a single foundry and have the option of additional capacity should they need it.

GLOBALFOUNDRIES 90nm process comprises of logic and mixed signal.

90nm Logic Process

The 90nm logic process features multiple transistor options for optimum system level tuning. Triple gate oxide further adds flexibility to system-level design tradeoffs to satisfy leakage, power and performance requirements. With a shrink factor of up to 38% going from 0.13 micron to 90nm, customers enjoy significant increase in die size savings.

The logic process is built on a modular architecture where modules such as embedded memory and analog/mixed-signal are incorporated easily and effectively for best application fit.

90nm Logic Transistors
90nm Generic (1.0V/1.2V)	90nm Low Power (1.2V)
RVt or High Vt	SHigh Vt
AVt or Std Vt	High Vt
Low Vt	RVt or Std Vt
eMPU Vt	Low Vt
I/O VDD OPTIONS 3.3, 2.5, 1.8, 1.5, 1.2V	I/O VDD OPTIONS 3.3, 2.5, 1.8V

Process Features

Process Technology	Key Characteristics
Well	Super Steep Retrograde
Isolation	Shallow Trench
Gate	Surface-channel N & PMOS, source/drain extension with pocket implant, triple gate oxide option
Lithography	193/248 nm lithography with OPC/PSM
Salicidation	Low resistance Cobalt Silicide
Metal Interconnect	Up to 9 layers Dual-Damascene Cu with different Backend-Of-Line option (1x, 2x, 4x metal pitch)
Inter-metal dielectric	Low-k
Plug-in modules	Electrical Fuse , Inductor, MiM capacitor, MOS & PN varactor, Resistors, Deep Nwell, Zero Vt, Bipolar

GLOBALFOUNDRIES offers the 90nm process family complete with multiple Vt and multiple IO options. The CH90G process is ideal for low-end graphics processors, network processors and other mid-performance applications. To address the need for low-leakage, low-power (LP) handheld and mobile applications, GLOBALFOUNDRIES offers the CH90LP solution.

Customers can also use the GLOBALFOUNDRIES' GlobalShuttle Multi-Project Wafer (MPW) program for prototyping and silicon validation of key IP blocks. For GlobalShuttle schedules click here.

Common Design Platform

A key value proposition of the 90nm Common Platform Technology is the cross-foundry design enablement program that provides a comprehensive set of open, standard design solutions. Comprising of pre-qualified library, EDA, IP and other design service providers, the 90nm common design platform ensures GDSII compatibility for true multiple sourcing at GLOBALFOUNDRIES and its platform partners. It frees customers from proprietary lock-in as well as reduces risks and design costs associated with advanced nanotechnologies.

Design Enablement	90nm Generic	90nm Low Power
Standard Cells (multi-Vt)	•	•
Memory Compilers (multi-Vt)	•	•
SP SRAM Compiler	•	•
DP SRAM Compiler	•	•
1P, 2P Register File	•	•
ROM	•	•
IO libraries	•	•
Analog Mixed Signal IPs	•	•
Standards Interface IPs	•	•
Tech files (LVS, DRC, PEX)	•	•
PDK	•	•
Design Reference Flow	•	•

90nm Process Technologies

90nm Logic Process

Process Features

Common Design Platform

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